CSE Dept conducts technical workshop titled “Hands-on Exploration of RISC-V Architecture using Ripes Simulator”

With the objective of assisting S4 Computer Science and Engineering students in gaining practical, hands-on understanding of the RISC-V architecture using the Ripes Simulator, a one-day technical workshop titled “Hands-on Exploration of RISC-V Architecture Using Ripes Simulator” was conducted during the Academic Year 2025–26 on 21 February 2026 with 100 students in attendance.

The workshop aimed to give students basic practical knowledge of the RISC-V architecture using the Ripes Simulator. Through simple hands-on activities, students learned how instructions are executed and how different parts of a processor work, helping them better understand computer organization concepts.

The session was handled by Mr. Lomin Joy (Senior Project Engineer,Indian Institute of Technology Palakkad). He brought valuable industry and research experience, enriching the session with practical insights into computer architecture and system design.

The workshop focused on providing practical exposure to the RISC-V architecture using the Ripes Simulator. Students were introduced to the fundamentals of instruction formats, datapath design, pipelining concepts, and instruction execution flow. Through hands-on sessions, participants were able to visualize how instructions are executed within a processor, observe register and memory changes, and understand the working of core architectural components.

The interactive format of the workshop allowed students to actively engage in simulations, experiment with sample programs, and analyze execution behavior step by step. This practical exposure significantly enhanced their understanding of theoretical concepts covered in class.

Student feedback indicated a very high level of satisfaction. The majority of participants rated the overall program, the resource person, the hands-on sessions, and the learning outcomes as “Very Good.” The responses reflect the workshop’s strong academic relevance, effective delivery, and positive impact on student learning.

Program Outcomes:
The program enabled students to gain a clear hands-on understanding of the RISC-V architecture using the Ripes Simulator and effectively apply these concepts in their PBL course projects.